| [2018] |
|
| 158 |
Development of integrated photoplethysmographic recording circuit for trans-nail pulse-wave monitoring system [Japanese Journal of Applied Physics, Vol. 57, No.4S, March 2018, 04FM11-1- 04FM11-4] Zhengyang Qian, Yoshiki Takezawa, Kenji Shimokawa, Hisashi Kino, Takafumi Fukushima, Koji Kiyoyama, and Tetsu Tanaka |
| 157 |
Tunnel field-effect transistor charge-trapping memory with steep subthreshold slope and large memory window [Japanese Journal of Applied Physics, Vol. 57, No.4S, March 2018, 04FE07-1- 04FE07-4] Hisashi Kino, Takafumi Fukushima, and Tetsu Tanaka |
| 156 |
Study of Al-doped ZnO Transparent Stimulus Electrode for Fully Implantable Retinal Prosthesis with Three-dimensionally Stacked Retinal Prosthesis Chip. [Sensors and Materials, Volume 30, Number 2 (2018), pp. 225-234]Hisashi Kino, Takafumi Fukushima, and Tetsu Tanaka |
| [2017] |
|
| 155 |
Self-Assembly and Electrostatic Carrier Technology for Via-Last TSV Formation Using Transfer Stacking-Based Chip-to-Wafer 3-D Integration. [IEEE TRANSACTIONS ON ELECTRON DEVICES, Vol.64, pp.5065-5062, 2017] Hideto Hashiguchi, Takafumi Fukushima, Hiroyuki Hashimoto, Ji-Cheol Bea, Mariappan Murugesan, Hisashi Kino, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 154 |
Experimental Evaluation of Stimulus Current
Generator with Laplacian Edge-enhancement for
3-D Stacked Retinal Prosthesis Chip. [IEEE Biomedical Circuits and Systems Conference,
pp.725-728, 2017] Kenji Shimokawa, Zhengyang Qian, Yoshiki Takezawa, Hisashi Kino,
Takafumi Fukushima, Koji Kiyoyama, and Tetsu Tanaka |
| 153 |
Ultrawide range square wave impedance analysis
circuit with ultra-slow Ring-Oscillator using gate-induced drain-leakage current. [IEEE Biomedical Circuits and Systems Conference,
pp.412-415, 2017] Yoshiki Takezawa, Koji Kiyoyama, Kenji Shimokawa, Zhengyang Qian, Hisashi Kino,
Takafumi Fukushima and Tetsu Tanaka |
| 152 |
3-D Sidewall Interconnect Formation Climbing Over Self-Assembled KGDs for Large-Area Heterogeneous Integration [IEEE Transactions on Electron Devices, Volume 64, Issue7, pp. 2912-2918, 2017] Takafumi Fukushima, Akihiro Noriki, Jichoel Bea, Mariappan Murugesan, Hisashi Kino, Koji Kiyoyama, Kang-Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi |
| 151 |
Evaluation of insertion characteristics of less invasive Si optoneural probe with embedded optical fiber [Japanese Journal of Applied Physics 56, 04CM08 (2017)]Takumi Morikawa, Takuya Harashima, Hisashi Kino, Takafumi Fukushima, and Tetsu Tanaka |
| 150 |
Design and evaluation of wide-range and low-power analog front-end enabling body-implanted devices to monitor charge injection properties [Japanese Journal of Applied Physics 56, 04CM05 (2017)]Keita Ito, Shoma Uno, Tatsuya Goto, Yoshiki Takezawa, Takuya Harashima, Takumi Morikawa, Satoru Nishino, Hisashi Kino, Koji Kiyoyama, and Tetsu Tanaka |
| 149 |
Development of Si neural probe with piezoresistive force sensor for minimally invasive and precise monitoring of insertion forces [Japanese Journal of Applied Physics 56, 04CM04 (2017)]Takuya Harashima, Takumi Morikawa, Hisashi Kino, Takafumi Fukushima, Tetsu Tanaka |
| [2016] |
|
| 148 |
Wide-range and precise tissue
impedance analysis circuit with ultralow current source using gate-induced
drain-leakage current. [IEEE Biomedical Circuits and Systems Conference,
pp.351-354, 2016] Koji Kiyoyama, Yoshiki Takezawa, Tatsuya Goto, Keita Ito,
Shoma Uno, Kenji Shimokawa, Satoru Nishino, Hisashi Kino, Tetsu Tanaka |
| 147 |
Design and evaluation of
area-efficient and wide-range impedance analysis circuit for multichannel
high-quality brain signal recording system. [Japanese Journal of Applied
Physics, Vol. 55, No.4S, March 2016, 04EM12-1-04EM12-5] Takuma Iwagami,
Takaharu Tani, Keita Ito, Satoru Nishino, Takuya Harashima, Hisashi Kino,
Koji Kiyoyama, and Tetsu Tanaka |
| 146 |
Effect of local stress induced
by thermal expansion of underfill in three-dimensional stacked IC. [Japanese
Journal of Applied Physics, Vol. 55, No.4S, March 2016, 04EC03-1-04EC03-4]
Hisashi Kino, Hideto Hashiguchi, Seiya Tanikawa, Youhei Sugawara, Shunsuke
Ikegaya, Takafumi Fukushima, Mitsumasa Koyanagi, Tetsu Tanaka |
| 145 |
Evaluation of In-plane Local
Bending Stress Distribution with DRAM Cell Array for Highly Reliable 3D IC.
[Japanese Journal of Applied Physics, Vol. 55, No.4S, March 2016,
04EC07-1-04EC07-4] Seiya Tanikawa, Hisashi Kino, Takafumi Fukushima,
Mitsumasa Koyanagi, Tetsu Tanaka |
| 144 |
Self-Assembly Based
Multichip-to-Wafer Bonding Technologies for 3D/Hetero Integration. [ECS
Transactions, 75(9), 285-290, 2016] T. Fukushima, K.W. Lee, T. Tanaka, and M.
Koyanagi |
| 143 |
Oxide-Oxide Thermocompression
Direct Bonding Technologies with Capillary Self-Assembly for
Multichip-to-Wafer Heterogeneous 3D System Integration. [Micromachines,
7(10), 184-1-184-18, 2016] Takafumi Fukushima, Hideto Hashiguchi, Hiroshi
Yonekura, Hisashi Kino, Mariappan Murugesan, Ji-Chel Bea, Kang-Wook Lee,
Tetsu Tanaka and Mitsumasa Koyanagi |
| 142 |
Impact of Chip-Edge Structures
on Alignment Accuracies of Self-Assembled Dies for Microelectronic System
Integration. [Journal of Microelectromechanical Systems, vol. 25(1), 91-100,
2016] Yuka Ito, Takafumi Fukushima, Hisashi Kino, Kang-Wook Lee, Tetsu Tanaka,
Mitsumasa Koyanagi |
| [2015] |
|
| 141 |
Novel Hybrid Bonding Technology
Using Ultra-High Density Cu Nano-Pillar for Exascale 2.5D/3D Integration.
[IEEE Electron Device Letters, 37, (2015), 81-83] Kangwook Lee, Jichel Bea,
Takafumi Fukushima, Suresh Ramalingam, Xin Wu, Tetsu Tanaka, and Mitsumasa
Koyanagi |
| 140 |
Applications of
three-dimensional LSI. [MRS BULLETIN, vol.40, 242-247, 2015] Mitsumasa
Koyanagi, Takafumi Fukushima, Kang-Wook Lee, and Tetsu Tanaka |
| 139 |
Vertical-cavity surface-emitting
laser chip bonding by surface-tension-driven self-assembly for optoelectronic
heterogeneous integration. [Japanese Journal of Applied Physics, 54(3),
030206-1-6, 2015] Yuka Ito, Takafumi Fukushima, Hisashi Kino, Kang-Wook Lee,
Koji Choki, Tetsu Tanaka |
| [2014] |
|
| 138 |
Highly Dependable 3-D Stacked
Multicore Processor System Module Fabricated Using Reconfigured
Multichip-on-Wafer 3-D Integration Technology. [IEEE International Electron
Devices Meeting (IEDM) Technical Digest (2014), pp.669-672] K.-W. Lee, H.
Hashimoto, M. Onishi, Y. Sato, C. Nagai, M. Murugesan, J.-C. Bea, T.
Fukushima, T. Tanaka, M. Koyanagi, |
| 137 |
Highly Beneficial Organic Liner
for 3um Diameter Cu TSV for 12-inch Wafer Level 3D Integration Involving up
to 400oC_Highly Suppressed Si Lattice Distortion and Extremely Low Thermal
Stress. [IEEE International Electron Devices Meeting (IEDM) Technical Digest
(2014), pp.374-377] M. Murugesan, T. Fukushima, J.C. Bea, Y. Sato, H.
Hashimoto, K.W. Lee, and M. Koyanagi, |
| 136 |
Nucleation Kinetics of
Electroless Cu Deposition on Ruthenium Using Glyoxylic Acid as a Reducing
Agent. [Journal of the Electrochemical Society, 161 (14) D768-D774, October
2014] Fumihiro Inoue, Harold Philipsen, Marleen H. van der Veen, Stefaan Van
Huylen-broeck, Silvia Armini, Herbert Struyf, and Tetsu Tanaka |
| 135 |
Mechanical Characteristics of
Thin Die/Wafers in Three-Dimensional Large-Scale Integrated Systems. [IEEE
Transactions on Semiconductor Manufacturing, Vol.99, 14th April 2014] M.
Murugesan, T. Fukushima, J.C. Bea, K.W. Lee, M. Koyanagi, |
| 134 |
Deteriorated Device
Characteristics in 3D-LSI Caused by Distorted Silicon Lattice. [IEEE
TRANSACTIONS ON ELECTRON DEVICES, Vol. 61, No.2, Feb.2014, pp540-546]
Mariappan Murugesan, Yasuhiko Imai, Shigeru Kimura, Takafumi Fukushima, Ji
Cheol Bea, Hisashi Kino, Kang-Wook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 133 |
Reconfigured-Wafer-to-Wafer 3D
Integration Using Parallel Self-Assembly of Chips with Cu-SnAg Microbumps and
a Nonconductive Film. [IEEE TRANSACTIONS ON ELECTRON DEVICES, Vol.61, No.2,
Feb.2014, pp533-539] Takafumi Fukushima, Ji Cheol Bea, Hisashi Kino, Chisato
Nagai, Mariappan Murugesan, Hideto Hashiguchi, Kang-Wook Lee, Tetsu Tanaka,
and Mitsumasa Koyanagi |
| 132 |
Impacts of 3D Integration
Processes on Memory Retention Characteristics in Thinned DRAM Chip For
High-Reliable 3D DRAM. [IEEE TRANSACTIONS ON ELECTRON DEVICES, Vol. 61, No.2,
Feb.2014, pp379-385] Kang-Wook Lee, Seiya Tanikawa, Mariappan Murugesan,
Hideki Naganuma, Ji Cheol Bea, Takafumi Fukushima, Tetsu Tanaka, and
Mitsumasa Koyanagi |
| 131 |
Barrier Properties of CVD Mn
Oxide Layer to Cu Diffusuion for 3-D STV. [IEEE ELECTION DEVICE LETTERS,
35(1), (2014), 114-116] Kang-Wook Lee,Hao Wang, Ji Cheol Bea, Mariappan
Murugesan, Yuji Sutou, Takafumi Fukushima, Tetsu Tanaka, Junichi Koike, and
Mitsumasa Koyanagi |
| 130 |
Deteriorated Device
Characteristics in 3D-LSI Caused by Distorted Silicon Lattice. [IEEE
TRANSACTIONS ON ELECTRON DEVICES, 61(2), (2014), 540-546] Mariappan
Murugesan, Yasuhiko Imai, Shigeru Kimura, Takafumi Fukushima, Ji Cheol Bea,
Hisashi Kino, Kang-Wook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 129 |
Reconfigured-Wafer-to-Wafer 3D
Integration Using Parallel Self-Assembly of Chips with Cu-SnAg Microbumps and
a Nonconductive Film. [IEEE TRANSACTIONS ON ELECTRON DEVICES, 61(2), (2014),
533-539] Takafumi Fukushima, Ji Cheol Bea, Hisashi Kino, Chisato Nagai,
Mariappan Murugesan, Hideto Hashiguchi, Kang-Wook Lee, Tetsu Tanaka, and
Mitsumasa Koyanagi |
| 128 |
Impacts of 3D Integration
Processes on Memory Retention Characteristics in Thinned DRAM Chip For
High-Reliable 3D DRAM. [IEEE TRANSACTIONS ON ELECTRON DEVICES, 61(2), (2014),
379-385] Kang-Wook Lee, Seiya Tanikawa, Mariappan Murugesan, Hideki Naganuma,
Ji Cheol Bea, Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 127 |
Impact of Cu Contamination on
Device Reliabilities in 3-D IC Integration. [IEEE Transactions on Device and
Materials Reliability, 14(1), (2014), 451-462] K-W. Lee, J.C Bae, Y. Ohara,
M. Murugesan, T. Fukushima, T. Tanaka and M. Koyanagi |
| 126 |
Envelope tracking CMOS power
amplifier with high-speed CMOS envelope amplifier for mobile handsets.
[Japanese Journal of Applied Physics, 53(4S), (2014), 04EE19-1-04EE19-4] Eiji
Yoshida1, Yasufumi Sakai, Kazuaki Oishi, Hiroshi Yamazaki, Toshihiko Mori, Shinji
Yamaura, Kazuo Suto, and Tetsu Tanaka |
| [2013] |
|
| 125 |
Reductant-Assisted Self-Assembly
with Cu/Sn Microbump for Three-Dimensional Heterogeneous Integration.
[Japanese Journal of Applied Physics, 52(4), (2013), 04CB09-1-04CB09-6], Yuka
Ito, Takafumi Fukushima, Kang-Wook Lee, Koji Choki, Tetsu Tanaka, and Mitsumasa
Koyanagi |
| 124 |
Study of Insertion
Characteristics of Si Neural Probe with Sharpened Tip for Minimally Invasive
Insertion to Brain. [Japanese Journal of Applied Physics, 52(4), (2013),
04CL04-1-04CL04-6] Sanghoon Lee, Soichiro Kanno, Hisashi Kino, Tetsu Tanaka |
| 123 |
Analysis of Local Bending Stress
Effect on CMOS Performance Fabricated in Thinned Si Chip for Chip-to-Wafer 3D
Integration. [Japanese Journal of Applied Physics, 52(4), (2013),
04CB11-1-04CB11-6] Hisashi Kino, Ji Cheol Bea, Mariappan Murugesan, Kang-Wook
Lee, Takafumi Fukushima, Mitsumasa Koyanagi, Tetsu Tanaka |
| 122 |
Development and In Vivo
Evaluation of Conductive Polymer (PEDOT) Stimulus Electrodes for Fully
Implantable Retinal Prosthesis. [Japanese Journal of Applied Physics, 52(4),
(2013), 04CL03-1-04CL03-5] Chikashi kigure, Hideki Naganuma, Yuichiro Sasaki,
Hiroshi Kino, Tetsu Tanaka |
| 121 |
Degradation of Memory Retention
Characteristics in DRAM Chip by Si Thinning for 3-D Integration. [IEEE
ELECTRON DEVICES LETTERS, 34(8), (2013), 1038-1040] Kangwook Lee, Seiya
Tanikawa, Mariappine Murugesan, Hideki Naganuma, Haro Shimamoto, Takafumi
Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 120 |
Die-Level 3-D Integration
Technology for Rapid Prototyping of High-Performance Multifunctionality
Hetero-Integrated Systems. [IEEE TRANSACTIONS ON ELECTRON DEVICES, 60(11),
(2013), 3842-3848] Kang-Wook Lee, Yuki Ohara, Kouji Kiyoyama, Ji-Cheol Bea,
Mariappan Murugesan, Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 119 |
Revisiting the Silicon-Lattice
in the High-Density 3D-LSIs _ in the Perspective of Device Reliability. [IEEE
International Electron Devices Meeting Technical Digest, (2013), 172-175] M.
Murugesan, T. Fukushima, J.C. Bea, K.W. Lee, T. Tanaka, M. Koyanagi |
| [2012] |
|
| 118 |
High-step-coverage Cu-lateral
interconnections over 100 μm thick chips on a polymer substrate - an
alternative method to wire bonding. [JOURNAL of Micromechanics and
Microengineering, 22(8), (2012), 085033-1-085033-9] M. Murugesan, T.
Fukushima, K. Kiyoyama, J.C. Bea, T. Tanaka and M. Koyanagi |
| 117 |
Pillar-shaped stimulus electrode
array for high-efficiency stimulation of fully implantable epiretinal
prosthesis. [JOURNAL of Micromechanics and Microengineering, 22(8), (2012),
105015-1-105015-11] Kang-Wook Lee, Yoshinobu Watanabe, Chikashi Kig-ure, Takafumi
Fukushima, Mitsumasa Koyanagi and Tetsu Tanaka |
| 116 |
Impact of Cu Contamination on
Memory Retention Characteristics in Thinned DRAM Chip for 3-D Integration.
[IEEE Electron Device Letters, 33(9), (2012), 1297-1299] Kangwook Lee,
Takaharu Tani, Hideki Naganuma, Yuki Ohara, Takafumi Fukushima, Tetsu Tanaka,
and Mitsumasa Koyanagi |
| 115 |
Multichip-to-Wafer
Three-Dimensional Integration Technology Using Chip Self-Assembly With
Excimer Lamp Irradiation. [IEEE TRANSACTIONS ON ELECTRON DEVICES, 59(11),
(2012), 2956-2963] Takafumi Fukushima, Eiji Iwata, Yuki Ohara, Mariappan
Murugesan, Jichoel Bea, Kangwook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 114 |
Characterization of Chip-level
Hetero-Integration Technology for High-Speed, Highly Parallel 3D-Stacked
Image Processing System. [IEEE International Electron Devices Meeting
Technical Digest, (2012), 785-788] K-W Lee, Y. Ohara, K. Kiyoyama, S. Konno,
Y. Sato, S. Watanabe, A. Yabata, T. Kamada, J-C Bea, H. Hashimoto, M.
Murugesan, T. Fukushima, T. Tanaka, and M. Koyanagi |
| 113 |
Minimizing the Local Deformation
Induced around Cu-TSVs and CuSn/InAu-Microbumps in High-Density 3D-LSIs.
[IEEE International Electron Devices Meeting Technical Digest, (2012),
657-660] M. Murugesan, H. Kobayashi, H. Shimamoto, F. Yamada, T. Fukushima, J.C.
Bea, K.W. Lee, T. Tanaka, and M. Koyanagi |
| 112 |
New Chip-to-Wafer 3D Integration
Technology Using Hybrid Self-Assembly and Electrostatic Temporary Bonding.
[IEEE International Electron Devices Meeting Technical Digest, (2012),
789-792] T. Fukushima, H. Hashiguchi, J. Bea, Y. Ohara, M. Murugesan, K.-W.
Lee, T. Tanaka, and M. Koyanagi |
| 111 |
Through-Silicon Photonic Via and
Unidirectional Coupler for High-Speed Data Transmission in Optoelectronic
Three-Dimensional LSI. [IEEE ELECTRON DEVICES LETTERS, 33(2), (2012),
221-223] Akihiro Noriki, Kangwook Lee, Jicheol Bea, Takafumi Fukushima, Tetsu
Tanaka, and Mitsumasa Koyanagi |
| 110 |
Low-Resistance Cu-Sn
Electroplated Evaporated Microbumps for 3D Chip Stacking. [Journal of
ELECTRONIC MATERIALS, Online, (2012)] M. MURUGESAN, Y. OHARA, T. FUKUSHIMA,
T. TANAKA, and M. KOYANAGI |
| [2011] |
|
| 109 |
Evaluation of Cu Contamination
at Backside Surface of Thinned Wafer in 3-D Integration by
Transient-Capacitance Measurement. [IEEE ELECTRON DEVICE LET-TERS, 32(1),
(2011), 66-68] Jichel Bea, Kangwook Lee, Takafumi Fukushima, Tetsu Tanaka and
Mitsumasa Koyanagi |
| 108 |
Self-Assembly of Chip-Size
Components with Cavity Structures: High-Precision Alignment and Direct
Bonding without Thermal Compression for Hetero Integration. [Micromachines,
2, (2011), 49-68] Takafumi Fukushima, Takayuki Konno, Eiji Iwata, Risato
Kobayashi, Toshiya Kojima, Mariappan Murugesan, Ji-Chel Bea, Kang-Wook Lee,
Tetsu Tanaka, and Mitsumasa Koyanagi |
| 107 |
Comparison of electrode
materials for the use of retinal prosthesis. [Bio-Medical Materials and
Engineering, vol. 21, 83_97] Onnela Niina, Takeshita Hirotaka, Kaiho
Yoshiuki, Kojima Toshiya, Kobayashi Risato, Tanaka Tetsu, and Hyttinen Jari |
| 106 |
Three-Dimensional Hybrid
Integration Technology of CMOS, MEMS, and Photonics Circuits for
Optoelectronic Heterogeneous Integrated Systems. [IEEE TRANSACTIONS ON
ELECTRON DEVICES, 58(3), (2011)] Kang-Wook Lee, Akihiro Noriki, Kouji
Kiyoyama, Takafumi Fukushima,Tetsu Tanaka and Mitsumasa Koyanagi |
| 105 |
Evaluation of Cu Diffusion from
Cu Through-Silicon Via (TSV) in 3-D LSI by Transient Capacitance Measurement.
[IEEE EDL, 32(7), (2011), 940-942] J-C. Bea, K.W. Lee, T. Fukushima, T.
Tanaka, M. Koyanagi |
| 104 |
Multichip Self-Assembly
Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known
Good Dies in Batch Processing. [IEEE TRANSACTIONS ON COMPONENTS, PACKAGING
AND MANUFACTURING TECHNOLOGY, 1(12), (2011), 1873-1884] Takafumi Fukushima, Eiji
Iwata, Yuki Ohara, Mariappan Murugesan, Jichoel Bea, Kangwook Lee, Tetsu
Tanaka, and Mitsumasa Koyanagi |
| [2010] |
|
| 103 |
3D Hybrid Integration Technology
for Opto-Electronic Hetero-Integrated Systems. [Jpn. J. Appl. Phys., 49,
(2010), 066503-1-066503-4] Yanli Pei, Toshiya Kojima, Tatsuro Hiraki,
Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 102 |
Self-Assembly Technology for
Reconfigured Wafer-to-Wafer 3D Integration. [Proc. of Electronic Components
and Technology Conference (ECTC), (2010), 1050-1053] T. Fukushima, E. Iwata,
K.-W. Lee, T. Tanaka, and M. Koyanagi |
| 101 |
Investigation of Effects of
Post-Deposition Annealing on Cobalt Nanodots Embedded in Silica for
Nonvolatile Memory Application. [Jpn. J. Appl. Phys., 49(6), (2010),
066503-1-066503-4] Yanli Pei, Toshiya Kojima, Tatsuro Hiraki, Takafumi
Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 100 |
Wafer Thinning, Bonding, and
Interconnects Induced Local Strain/Stress in 3D-LSIs with Fine-Pitch
High-Density Microbumps and Through-Si Vias. [IEEE IEDM Technical Digest,
(2010), 30-34] M. Murugesan, H. Kino, H. Nohira, J.C. Bea, A. Horibe,
F.Yamada, C. Miyazaki, H. Kobayashi, T. Fukushima, T. Tanaka, and M. Koyanagi |
| 99 |
A Cavity Chip Interconnection
Technology for Thick MEMS Chip Integration in MEMS-LSI Multichip Module.
[JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, Vol.19, No.6, December 2010,
pp.1284-1291] Kang-Wook Lee, Soichiro Kanno, Kouji Kiyoyama, Takafumi
Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 98 |
Surface-tension-driven chip
self-assembly with load-free hydrogen fluoride-assisted direct bonding at
room temperature for three-dimensional integrated circuits. [Applied Physics
Letters, Vol. 96, pp.154105-1 - 154105-3, (2010)] T. Fukushima, E. Iwata, T.
Konno, J.-C. Bea, K.-W. Lee, T. Tanaka, and M. Koyanagi |
| [2009] |
|
| 97 |
3D Heterogeneous Opto-Electronic
Integration Technology for System-on-Silicon (SOS). [IEEE IEDM Technical
Digest, (2009), 531-534] K-W Lee, A. Noriki, K. Kiyoyama, S. Kanno, R.
Kobayashi, W-C Jeong, J-C Bea, T. Fukushima, T. Tanaka, and M. Koyanagi |
| 96 |
Impact of Remnant Stress/Strain
and Metal Contamination in 3D-L Sis with Through-Si Vias Fabricated by wafer
Thinning and Bonding. [IEEE IEDM Technical Digest, (2009), 361-364] M.
Murugesan, C. Bea, H .Kino, Y. Ohara, T. Kojima, A. Noriki, K. W. Lee, K. Kiyoyama
, T. Fukushima, H. Nohira, T. Hattori, E. Ikenaga, T. Tanaka, and M. Koyanagi |
| 95 |
Three-Dimensional Integration
Technology Based on Reconfigured Wafer-to-Wafer and Multichip-to-Wafer
Stacking Using Self-Assembly Method. [IEEE IEDM Technical Digest, (2009),
349-352] Takafumi Fukushima, Eiji Iwata, Yuki Ohara, Akihiro Noriki, Kiyoshi
Inamura, Kang-Wook Lee, Jicheol Bea, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 94 |
Memory characteristics of
metal-oxide-semiconductor capacitor with high density cobalt nanodots
floating gate and HfO2 blocking dielectric. [Applied Physics Letters, 95, (2009),
033118-1-033118-3] Yanli Pei, Chengkuan Yin, Toshiya Kojima, Masahiko
Nishijima, Takafumi Fukushima, Testu Tanaka, and Mitsumasa Koyanagi |
| 93 |
Development of Si Double-Sided
Microelectrode for Platform of Brain Signal Processing System. [Japanese
Journal of Applied Physics, 48(4), (2009), C194-1-C194-5] Risato Kobayashi,
Soichiro Kanno, Lee Sanghoon, Bea Jicheol, Takafumi Fukushima, Kazuhiro Sakamoto,
Norihiro Katayama, Hajime Mushiake, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 92 |
Development of Si Neural Probe
with Microfluidic Channel Fabricated Using Wafer Direct Bonding. [Japanese
Journal of Applied Physics, 48(4), (2009), C189-1-C189-4] Soichiro Kanno,
Risato Kobayashi, Lee Sanghoon, Bea Jicheol, Takafumi Fukushima, Kazuhiro Sakamoto,
Norihiro Katayama, Hajime Mushiake, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 91 |
Characteristics of copper spiral
inductors utilizing FePt nano-dots film. [Japanese Journal of Applied
Physics, 48(4), (2009), C157-1-C157-4] W.-C. Jeong, K. Kiyoyama, K.-W. Lee,
A. Noriki, M. Murugesan, T. Fukushima, T. Tanaka, and M. Koyanagi |
| 90 |
Fundamental Study of
Complementary Metal Oxide Semiconductor Image Sensor for Three-Dimensional
Image Processing System. [Japanese Journal of Applied Physics, 48(4), (2009),
C077-1-C077-5] Kenji Makita, Kouji Kiyoyama, Takeaki Sugimura, Kang Wook Lee,
Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi |
| 89 |
Optical Interposer Technology
using Buried Vertical-Cavity Surface-Emitting Laser Chip and Tapered
Through-Silicon Via for High-Speed Chip-to-Chip Optical Interconnection.
[Japanese Journal of Applied Physics, 48(4), (2009), C113-1-C113-5] Akihiro
Noriki, Makoto Fujiwara, Kang-Wook Lee, Woo-Cheol Jeong, Takafumi Fukushima,
Tetsu Tanaka, Mitsumasa Koyanagi |
| 88 |
MOSFET nonvolatile memory with a
high-density tungsten nanodot floating gate formed by self-assembled nanodot
deposition. [Semiconductor Science and Technology, 24, (2009), 045022-045025]
Y. Pei, C. Yin, J.-C. Bea, H. Kino, T. Fukushima, T. Tanaka, and M. Koyanagi |
| 87 |
Formation of high density
tungsten nanodots embedded in silicon nitride for nonvolatile memory
application. [APPLIED PHYSICS LETTERS, 94, (2009), 063108-063110] Yanli Pei,
Chengkuan Yin, Masahiko Nishijima, Toshiya Kojima, Takafumi Fukushima, Tetsu
Tanaka, and Mitsumasa Koyanagi |
| 86 |
High-Density Through Silicon
Vias for 3-D LSIs. [Proceedings of the IEEE, 97(1), (2009), 49-59] Mitsumasa
Koyanagi, Takafumi Fukushima, and Tetsu Tanaka |
| [2008] |
|
| 85 |
3D System Integration Technology
and 3D Systems. [Conference Proceedings Advanced Metallization Conference
2008 (AMC 2008), (2009), 479-485] Takafumi Fukushima, Tetsu Tanaka, Mitsumasa
Koyanagi |
| 84 |
A Novel SPRAM (SPin-transfer
torque RAM)-based Reconfigurable Logic Block for 3D-Stacked reconfigurable
Spin Processor. [2008 IEEE International Electron Devices Meeting (IEDM)
Technical Digest, (2008), 935-937] M. Sekikawa, K. Kiyoyama, H. Hasegawa, K. Miura,
T. Fukushima, S. Ikeda, T. Tanaka, H. Ohno, and M. Koyanagi |
| 83 |
New Heterogeneous Multi-Chip
Module Integration Technology Using Self-Assembly Method. [2008 IEEE
International Electron Devices Meeting (IEDM) Technical Digest, (2008),
499-502] T. Fukushima, T. Konno, K. Kiyoyama, M. Murugesan, K. Sato,
W.-C.Jeong, Y. Ohara, A. Noriki, S. Kanno, Y. Kaiho, H. Kino, K. Makita,
R.Kobayashi, C.-K. Yin, K. Inamura, K.-W. Lee, J.-C. Bea, T. Tanaka, and
M.Koyanagi |
| 82 |
Memory Characteristics of
Self-Assembled Tungsten Nanodots Dispersed in Silicon Nitride. [Applied
Physics Letters, (2008)] Yanli Pei, Masahiko Nishijima, Takafumi Fukushima,
Tetsu Tanaka, Mitsumasa Koyanagi |
| 81 |
Investigation of the effect of
in situ annealing of FePt nanodots under high vacuum on the chemical states
of Fe and Pt by x-ray photoelectron spectroscopy. [JOURNAL OF APPLIED
PHYSICS, 104(7), (2008), 074316-1-074316-5] M. Murugesan, J. C. Bea, C. -K. Yin,
H. Nohira, E. Ikenaga, T. Hattori, M. Nishijima, T. Fukushima, T. Tanaka, M.
Miyao, and M. Koyanagi |
| 80 |
Multichip Self-Assembly
Technique on Flexible Polymeric Substrate. [Proceedings of the 59th
Electronic Components and Technology Conference (ECTC), (2008), 1532-1537] T.
Fukushima, T. Konno, S.Y. Ji, T. Tanaka, M. Koyanagi |
| 79 |
Study of Retinal Prosthesis with
Three-Dimensionally Stacked LSI. [Technical Digest of the International 3D
System Integration Conference 2008 (3D-SIC 2008), (2008), 229-239] K.Sato,
T.Fukushima, H.Tomiya, H.Kurino, T.Tanaka, M.Koyanagi |
| 78 |
Chip Self-Assembly Technique for
3D LSI Fabrication. [Technical Digest of the International 3D System
Integration Conference 2008 (3D-SIC 2008), (2008), 205-216] K. Kiyoyama, S.
Kodama, D. Amano, T. Sugimura, F. Fukushima, T. Tanaka, M. Koyanagi |
| 77 |
Three-Dimensional Integration
Technology Using Adhesive Injection Method and W/poly-Si TSV. [Technical
Digest of the International 3D System Integration Conference 2008 (3D-SIC
2008), (2008), 31-44] M. Koyanagi, T. Fukushima, T. Tanaka |
| 76 |
Power Supply System Using
Electromagnetic Induction for Three-Dimensionally Stacked Retinal Prosthesis
Chip. [Japanese Journal of Applied Physics, 47(4), (2008), 3244-3247] Ken
Komiya, Risato Kobayashi, Takafumi Kobayashi, Keigo Sato, Takafumi Fukushima,
Hiroyuki Kurino, Tetsu Tanaka, Makoto Tamai, Mitsumasa Koyanagi |
| 75 |
Low-Loss Optical Interposer with
Recessed Vertical-Cavity Surface-Emitting Laser Diode and Photodiode Chips
into Si Substrate. [Japanese Journal of Applied Phys-ics, 47(4), (2008),
2936-2940] Makoto Fujiwara, Shinsuke Terada1, Yoji Shirato, Hiroshi Owari,
Kei Watanabe, Mutsuhiro Matsuyama, Keizo Takahama, Tetsuya. Mori, Kenji
Miyao, Koji Choki, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi |
| 74 |
Tungsten Through-Silicon Via
Technology for Three-Dimensional LSIs. [Japanese Journal of Applied Physics,
47(4), (2008), 2801-2806] H. Kikuchi, Y. Yamada, A. M. Ali, J. Liang, T.
Fukushima, T. Tanaka, M. Koyanagi |
| 73 |
New Reconfigurable Memory
Architecture for Parallel Image Processing LSI with Three-Dimensional
Structure. [Japanese Journal of Applied Phys-ics, 47(4), (2008), 2774-2778]
Shigeo Kodama, Daijirou Amano, Takeaki Sugimura, Takafumi Fukushima, Tetsu
Tanaka, Mitsumasa Koyanagi |
| 72 |
Electrical Characterization of
MOS Memory Devices with High Density Self-Assembled Tungsten Nano-Dot.
[Japanese Journal of Applied Physics, 47(4), (2008), 2680-2683] Yan-Li PEI,
Takafumi FUKUSHIMA, Tetsu TANAKA, Mitsumasa KOYANAGI |
| 71 |
Microbump Formation on Flexible
Substrate using Imprint Technology for Integrated Nano-System with 3D-LSIs.
[The 5th International Conference on Mechanical Science based on
Nanotechnology, (2008), 71-74] Yusuke Yamada, Hirokozu Kikuchi, T. Fukushima,
T. Tanaka, M. Koyanagi |
| 70 |
3D System Integration Technology
and 3D Systems. [Proceedings of Materials for Advanced Metallization
Conference 2008 (MAM 2008), (2008), 37-38] T. Fukushima, T. Tanaka, M.
Koyanagi |
| [2007] |
|
| 69 |
Fully implantable retinal
prosthesis chip with photodetector and stimulus current generator. [IEEE
International Electron Devices Meeting Technical Digest, (2007), 1015-1018]
T. Tanaka, K. Sato, K. Komiya, T. Kobayashi, T. Watanabe, T. Fukushima, H.
Tomita, H.Kurino, M. Tamai, M. Koyanagi |
| 68 |
New three-dimensional
integration technology based on reconfigured wafer-on-wafer bonding
technique. [IEEE International Electron Devices Meeting Technical Digest,
(2007), 985-988] T. Fukushima, H. Kikuchi, Y. Yamada, T. Konno, J. Liang, K.
Sasaki, K. Inamura, T. Tanaka, M. Koyanagi |
| 67 |
High performance polynorbornene
optical waveguide for Opto-electric interconnections. [Polytronic 2007 6th
international IEEE conference on polymer and adhesives in, (2007), 193-197]
M. Fujiwara, Y. Shirato, H. Owari, K.Watanabe, M. Matsuyama, K. Takahama, T.
Mori, K. Miyao, K. Choki, T. Fukushima, T. Tanaka, M. Koyanagi |
| 66 |
Development of Fully Implantable
Retinal Prosthesis Module. [Proceedings of the 3rd Tohoku-NUS Joint Symposium
on Nano-Biomedical Engineering in the East Asian-Pacific Rim Region, (2007),
19-22] T. Tanaka, K. Sato, K. Komiya, T. Kobayashi, T. Fukushima, H. Tomita,
H. Kurino, M. Tamai, M. Koyanagi |
| 65 |
New Reconfigurable Memory
Architecture for Parallel Image Processing LSI with Three-Dimensional
Structure. [Extended Abstracts of the 2007 International Conference on Solid
State Device, (2007), 1067-1065] S. Kodama, D. Amano, T. Sugimura, T.
Fukushima, T. Tanaka, M. Koyanagi |
| 64 |
Investigation of FePt Nano-Dots
Fabricated by Self-Assembled Nano-Dot Deposition Method Using X-ray
Photoelectron Spectroscopy. [Extended Abstracts of the 2007 International
Conference on Solid State Device, (2007), 1026-1027] M. Murugesan, J. C. Bea,
C.K. Yin, H. Nohira, E. Ikenaga, T. Hattori, M. Nishijima, T. Fukushima, T.
Tanaka, M. Miyao, M. Koyanagi |
| 63 |
Development of Power Supply
System for Three-Dimensionally Stacked Retinal Prosthesis Chip. [Extended
Abstracts of the 2007 International Conference on Solid State Device, (2007),
658-689] K. Komiya, R. Kobayashi, T. Kobayashi, K. Sato, T. Fukushima, H. Tomita,
H. Kurino, T. Tanaka, M. Tamai, M. Koyanagi |
| 62 |
Tungsten Through-Si Via (TSV)
Technology for Three-Dimensional LSIs. [Extended Abstracts of the 2007
International Conference on Solid State Device, (2007), 482-483] H. Kikuchi,
Y. Yamada, A. M. Ali, J. Liang, T. Fukushima, T. Tanaka, M. Koyanagi |
| 61 |
Memory Window Enhancement of MOS
Memory Devices with High Density Self-Assembled Tungsten Nano-dot. [The 2007
International Conference on Solid State Device and Materials, (2007),
242-243] Y. Pei, T. Fukushima, T. Tanaka, M. Koyanagi |
| 60 |
Passive Optical Alignment with
High Accuracy for Low-Loss Optical Interposer. [Extended Abstracts of the
2007 International Conference on Solid State Device, (2007)] M. Fujiwara, S.
Terada, Y. Shirato, H. Owari, K. Watanabe, M. Matsuyama, K.Takahama, T.Mori,
K. Miyao, K. Choki, T. Fukushima, T. Tanaka, M. Koyanagi |
| 59 |
Fabrication of Magnetic Tunnel
Junction with FePt Nanodots for Magnetic Nanodot Memory. [The 6th
International Semiconductor Technology Conference (ISTC 2007), (2007),
418-422] C.K. Yin, M. Murugesan, J.C. Bea, T. Fukushima, T. Tanaka, M.
Koyanagi |
| 58 |
Evaluation of Platinum-Black
(Pt-b) Stimulus Electrode Array for Electrical Stimulation to Retinal Cells
in Retinal Prosthesis System. [Japanese Journal of Applied Physics, 46,
(2007), 2785-2791] T. Watanabe, R. Kobayashi, K. Komiya, T. Fukushima, H. Tomita,
E. Sugano, H. Kurino, T. Tanaka, M. Tamai, M. Koyanagi |
| 57 |
Novel Optical/Electrical Printed
Circuit Board with Polynorbornene Optical Waveguide. [Japanese Journal of
Applied Physics, 46, (2007), 2395-2400] M. Fujiwara, Y. Shirato, H. Owari, K.
Watanabe, M. Matsuyama, K. Takahama, T. Mori, K. Miyao, K. Choki, T. Fukushima,
T. Tanaka, M. Koyanagi |
| 56 |
Low Power Spin-Transfer
Magnetoresistive Random Access Memory Writing Scheme with Selective Word Line
Bootstrap. [Japanese Journal of Applied Physics, 46, (2007), 2226-2230] T.
Sugimura, T. Sakaguchi, T. Fukushima, T. Tanaka, M. Koyanagi |
| 55 |
New Magnetic Nanodot Memory with
FePt Nanodots. [Japanese Journal of Applied Physics, 46, (2007), 2167-2171]
C. K. Yin, M. Murugesan, J. C. Bea, M. Oogane, T. Fukushima, T. Tanaka, M.
Miyao, S. Samukawa, M. Koyanagi |
| 54 |
Highly Parallel Processing
System Using 3-Dimensional LSI. [International 3D-System Integration
Conference 2007, (2007)] T. Tanaka, T. Fukushima, and M. Koyanagi |
| 53 |
Development of Low Power 3D
Integration Technology using SOI Wafer for Retinal Prosthesis Chip.
[Proceedings of the 9th International Symposium of Future Medical Engineering
Based on Bio-nanotechnology, (2007), 613-622] Y. Yamada, J. Deguchi, T.
Watanabe, T. Fukushima, T. Tanaka, M. Koyanagi |
| 52 |
Evaluation of Electrical
Stimulus Current Applied to Retinal Cells for Retinal Prosthesis.
[Proceedings of the 9th International Symposium of Future Medical Engineering
Based on Bio-nanotechnology, (2007), 585-600] T. Watanabe, K. Motonami, T.
Fukushima, H. Kurino, T. Tanaka, M. Koyanagi |
| 51 |
Neuromorphic Analog Circuits for
Three Dimensionally Stacked Vision Chip. [Proceedings of the 9th
International Symposium of Future Medical Engineering Based on
Bio-nanotechnology, (2007), 455-464] J. Liang, Y. Nakagawa, J. Deguchi, S. J.
Chill, T. Fukushima, H. Kurino, T. Tanaka, M. Koyanagi |
| 50 |
Development of Low-Power Retinal
Prosthesis with Photodetectors and Stimulus Current Generators. [Proceedings
of the 9th International Symposium of Future Medical Engineering Based on
Bio-nanotechnology, (2007), 321-330] T. Watanabe, J. Deguchi, T. Fukushima,
H. Kurino, T. Tanaka, M. Koyanagi |
| 49 |
Biologically Inspired Vision
Chip Fabricated using 3-Dimensional Integration Technology. [Proceedings of
the 9th International Symposium of Future Medical Engineering Based on
Bio-nanotechnology, (2007), 261-270] H. Kurino, Y. Nakagawa, T. Nakamura, Y.
Yamada, K. W. Lee, T. Tanaka, M. Koyanagi |
| [2006] |
|
| 48 |
Novel Retinal Prosthesis with
Three-dimensionally Stacked LSI and Evaluation of Electrically Evoked
Potential. [Proceedings of the 8th International Symposium of Future Medical
Engineering Based on Bio-nanotechnology, (2006), 33-36] T. Tanaka, T. Watanabe,
H. Kikuchi, J. Deguchi, K. Motonami, T. Fukushima, H. Tomita, H. Kurino, M.
Tamai, M. Koyanagi |
| 47 |
Chip-to-wafer Three Dimensional
Integration Technology for Retinal Prosthesis Chips. [Proceedings of the 8th
International Symposium of Future Medical Engineering Based on
Bio-nanotechnology, (2006), 29-32] H. Kikuchi, T. Watanabe, Y. Yamada, A. M.
Ali, T. Fukushima, T. Tanaka, M. Koyanagi |
| 46 |
Three-dimensional integration
technology based on wafer bonding with vertical buried interconnections.
[IEEE Transactions on Electron Device, 53(11), (2006), 2799-2808] M.
Koyanagi, T. Nakamura, Y. Yamada, H. Kikuchi, T. Fukushima, T. Tanaka, H.
Kurino |
| 45 |
Super-Chip Integration Based on
Chip-to-Wafer 3D Integration Technology. [The 5th International Symposium on
Microelectronics and Packaging, (2006)] T. Tanaka, T. Fukushima, and M.
Koyanagi |
| 44 |
New Magnetic Nano-Dot Memory
with FePt Nano-Dots. [Extended Abstracts of the 2006 International Conference
on Solid State Devices and Materials, (2006), 994-995] C. K. Yin, J. C. Bea,
M. Murugesan, M. Oogane, T. Fukushima, T. Tanaka, K. Natori, M. Miyao, M.
Koyanagi |
| 43 |
Development of Si Long
Microprobe (SiLM) for Platform of Intelligent Neural Implant Microsystem.
[Extended Abstracts of the 2006 International Conference on Solid State
Devices and Materials, (2006), 898-899] R. Kobayashi, T. Watanabe, K. Komiya,
T. Fukushima, K. Sakamoto, H. Kurino, T. Tanaka, N. Katayama, H. Mushiake, M.
Koyanagi |
| 42 |
Evaluation of Electrical
Stimulus Current to Retina Cells for Retinal Prosthesis by Using
Platinum-Black (Pt-b) Stimulus Electrode Array. [Extended Abstracts of the
2006 International Conference on Solid State Devices and Materials, (2006),
890-891] T. Watanabe, K. Komiya, T. Kobayashi, R. Kobayashi, T. Fukushima, H.
Tomita, E. Sugano, M. Sato, H. Kurino, T. Tanaka, M. Tamai, M. Koyanagi |
| 41 |
Novel Opto-Electro Printed
Circuit Board with Polynorbornene Optical Wave-guide. [Extended Abstracts of
the 2006 International Conference on Solid State Devices and Materials,
(2006), 840-841] M. Fujiwara, Y. Shirato, H. Owari, K. Watanabe, M.
Matsuyama, K. Takahama, T. Mori, K. Miyao, K. Choki, T. Fukushima, T. Tanaka,
M. Koyanagi |
| 40 |
Low Power Spin-Transfer MRAM
Writing Scheme with Selective World Line Boot-strap. [Extended Abstracts of
the 2006 International Conference on Solid State Devices and Materials,
(2006), 602-603] T. Sugimura, T. Sakaguchi, D. Amano, T. Fukushima, T. Tanaka,
M. Koyanagi |
| 39 |
Sub-Atmospheric Chemical Vapor
Deposition Process for Chip-to-Wafer 3-Dimensional Integration. [Extended
Abstracts of the 2006 International Conference on Solid State Devices and
Materials, (2006), 490-491] H. Kikuchi, Y. Yamada, A. M. Ali, T. Fukushima,
T. Tanaka, M. Koyanagi |
| 38 |
Novel Retinal Prosthesis System
with Three Dimensionally Stacked LSI Chip. [Proceedings of 36th European
Solid-State Devices Research Conference, (2006), 327-330] T. Watanabe, H.
Kikuchi, T. Fukushima, H. Tomita, E. Sugano, H. Kurino, T. Tanaka, M. Tamai,
M. Koyanagi |
| 37 |
Magnetic properties of FePt
nanodots formed by a self-assembled nanodot deposition method. [APPLIED
PHYSICS LETTERS, 89, (2006), 063109-1-063109-3] C. K. Yin, T. Fukushima, T.
Tanaka, M. Koyanagi |
| 36 |
Ultimate Super-Chip Integration
Based on Chip-to-Wafer Three-Dimensional Integration Technology. [Proceedings
of International Conference on Electronics Packaging, (2006), 220-224] T.
Fukushima, Y. Yamada, H. Kikuchi, T. Tanaka, M. Koyanagi |
| 35 |
A capacitorless 1T-DRAM
technology using gate-induced drain leakage (GIDL) current for low-power and
high-speed embedded memory. [IEEE Transactions on Electron Device, 53(4),
(2006), 692-697] E. Yoshida, T. Tanaka |
| [2005] |
|
| 34 |
45-nm node CMOS integration with
a novel STI structure and full-NCS/Cu interlayers for low-operation-power
(LOP) applications. [IEEE International Electron Devices Meeting Technical
Digest, (2005), 57-60] M. Okuno, K. Okabe, T. Sakuma, K. Suzuki, T. Miyashita,
T. Yao, H. Morioka, M. Terahara, Y. Kojima, H. Watatani, K. Sugimoto, T.
Watanabe, Y. Hayami, T. Mori, T. Kubo, Y. Iba, I. Sugiura, H. Fukutome, Y.
Morisaki, H. Minakata, K. Ikeda, S. Kishii, N.Shimizu, T. Tanaka, S. Asai, M.
Nakaishi, S. Fukuyama, A. Tsukune, M. Yamabe, I. Hanyuu, M. Miyajima, M.
Kase, K.Watanabe, S. Satoh, T. Sugii |
| 33 |
New Transistor Structure for
Nano-Scale Range. [10th Photonics and Semiconductor Device Reliability
Workshop, (2005)] T. Tanaka, M. Park, H. Oh, Y. Yamada, H. Choi, T.
Fukushima, and M. Koyanagi |
| 32 |
A study of highly scalable
double gate FinDRAM (DG-FinDRAM). [IEEE Electron Device Letters, 26(9),
(2005), 655-657] E. Yoshida, T. Miyashita, T. Tanaka |
| [2004] |
|
| 31 |
Scalability study on a
capacitorless 1T-DRAM: From single-gate PD-SOI to double-gate FinDRAM.
(Invited) [IEEE International Electron Devices Meeting Technical Digest,
(2004), 919-922] T. Tanaka, E. Yoshida, T. Miyashita |
| [2003] |
|
| 30 |
A design of a capacitorless
1T-DRAM cell using gate-induced drain leakage (GIDL) current for low-power
and high-speed embedded memory. [IEEE International Electron Devices Meeting
Technical Digest, (2003), 913-916] E. Yoshida, T. Tanaka |
| 29 |
A 65 nm CMOS technology with a
high-performance and low-leakage transistor, a 0.55 um2 6T-SRAM cell and robust hybrid-ULK/Cu interconnects for mobile
multimedia applications. [IEEE International Electron Devices Meeting
Technical Digest, (2003), 285-288] S. Nakai, M. Kojima, N. Misawa, M.
Miyajima, S. Asai, S. Inagaki, Y. Iba, T. Ohba, M. Kase, H. Kitada, S. Satoh,
N. Shimizu, I. Sugiura, F. Sugimoto, Y. Setta, T. Tanaka, N. Tamura, M.
Nakaishi, Y. Nakata, J. Nakahira, N. Nishikawa, A. Hasegawa, S. Fukuyama, K.
Fujita, K. Hosaka, N. Horiguchi, H. Matsuyama, T. Minami, M. Minamizawa, H. Morioka,
E. Yano, A. Yamaguchi, K. Watanabe, T. Nakamura, T. Sugii |
| 28 |
Highly Reliable Dynamic Random
Access Memory Technology for Application Specific Memory with Dual Nitrogen
Concentration Gate Oxynitrides Using Selective Nitrogen Implantation.
[Japanese Journal of Applied Physics, 42, (2003), 1870-1873] T. Sugizaki, A. Murakoshi,
R. Katsumata, M. Kojima, T. Tanaka, T. Nakanishi, Y. Nara |
| [2002] |
|
| 27 |
Highly Reliable DRAM Technology
for ASM with Dual Nitrogen Concentration Gate Oxynitrides using Selective
Nitrogen Implantation. [Extended Abstracts of the 2002 International
Conference on Solid State Devices and Materials, (2002), 736-737] T.
Sugizaki, A. Murakoshi, T. Tanaka, R. Katsumata, T. Nakanishi, Y. Nara |
| 26 |
Impact of Thermal Budget
Reduction on MOSFET Performance to Achieve High-speed and High-density
DRAM-based System LSI. [Extended Abstracts of the 2002 International
Conference on Solid State Devices and Materials, (2002), 732-733] E. Yoshida,
T. Miyashita, H. Nitta, M. Tanaka, K. Ishii, Y. Akasaka, P. H. Chou, K.
Hashimoto, Y. Kohyama, T. Tanaka, Y. Nara |
| 25 |
Suppression of SiN-induced boron
penetration by using SiH-free silicon nitride films formed by
tetrachlorosilane and ammonia. [IEEE Transactions on Electron Device, 49(9),
(2002), 1526-1531] M. Tanaka, S. Saida, I. Mizushima, F. Inoue, M. Kojima, T.
Tanaka, T. Nakanishi, K. Suguro, Y. Tsunashima |
| [1999] |
|
| 24 |
Realization of 0.1 um
buried-channel PMOSFETs by device restructuring using tilted well
implantation technology. [Symposium on VLSI Technology, Digest of Technical
Papers, (1999), 109-110] T. Tanaka, Y. Momiyama, K. Goto, Y. Sambonsugi, M.
Deura, T. Sugii |
| 23 |
High frequency characteristics
of dynamic threshold-voltage MOSFET (DTMOS) under ultra-low supply voltage.
[IEICE Transactions on Electronics, E82-C(3), (1999), 538-543] T. Tanaka, Y.
Momiyama, T. Sugii |
| [1998] |
|
| 22 |
A study of ultra shallow
junction and tilted channel implantation for high performance 0.1um pMOSFETs.
[IEEE International Electron Devices Meeting Technical Di-gest, (1998),
631-634] K.-I. Goto, M. Kase, Y. Momiyama, H. Kurata, T. Tanaka, M. Deura, Y.
Sanbonsugi, T. Sugii |
| 21 |
Channel engineering using B10H14 ion implantation for
low Vth and high SCE immunity of buried-channel PMOSFETs in 4-Gbit DRAMs and
beyond. [Symposium on VLSI Technology, Digest of Technical Papers, (1998),
88-89] T. Tanaka, H. Ogawa, K. Goto, K. Itabashi, T. Yamazaki, J. Matsuo, T.
Sugii, I. Yamada |
| [1997] |
|
| 20 |
A high performance 50 nm PMOSFET
using decaborane (B10H14) ion implantation and
2-step activation annealing process. [IEEE International Electron Devices
Meeting Technical Digest, (1997), 471-474] K. -I. Goto, J. Matsuo, Y. Tada,
T. Tanaka, Y. Momiyama, T. Sugii, I. Yamada |
| 19 |
Fmax enhancement of dynamic
threshold-voltage MOSFET (DTMOS) under ultra-low supply voltage. [IEEE
International Electron Devices Meeting Technical Di-gest, (1997), 423-426] T.
Tanaka, Y. Momiyama, T. Sugii |
| [1996] |
|
| 18 |
A comparative study of advanced
MOSFET concepts. [IEEE Transactions on Electron Device, 43(10), (1996),
1742-1753] C. H. Wann, K. Noda, T. Tanaka, M. Yoshida, C. Hu |
| 17 |
Advanced SOI devices using CMP
and wafer bonding. [Extended Abstracts of the 1996 International Conference
on Solid State Devices and Materials, (1996), 473-475] H. Horie, S. Nakamura,
Y. Nara, K. Suzuki, T. Tanaka, A. Ito, Y. Arimoto, N. Sasaki |
| 16 |
New Method of Extracting
Inversion Layer Thickness and Charge Profile and Its Impact on Scaled
MOSFETs. [Extended Abstracts of the 1996 International Conference on Solid
State Devices and Materials, (1996), 10-12] T. Tanaka, T. Sugii, C. Hu |
| 15 |
A comparative study of advanced
MOSFET structures. [Symposium on VLSI Technology, Digest of Technical Papers,
(1996), 32-33] C. H. Wann, R. Tu, B. Yu, C. Hu, K. Noda, T. Tanaka, M.
Yoshida, K. Hui |
| [1995] |
|
| 14 |
High-Speed and Low-Power n+-p+ Double-Gate SOI
MOSFET's. [IEICE Transactions on Electronics, E78-C(4), (1995), 360-367] K.
Suzuki, T. Tanaka, Y. Tosaka, H. Horie, T. Sugii |
| 13 |
15 ps cryogenic operation of
0.19-mm-LG n+-p+ double-gate SOI CMOS.
[Proceedings of SPIE, Microelectronic Device and Multilevel Interconnection
Technology, 2636, (1995), 74-82] T. Sugii, T. Tanaka, H. Horie, K. Suzuki |
| [1994] |
|
| 12 |
Ultrafast operation of
Vth-adjusted p+-n+ double-gate SOI
MOSFET's. [IEEE Electron Device Letters, 15, (1994), 386-388] T. Tanaka, K.
Suzuki, H. Horie, T. Sugii |
| 11 |
Ultrafast low-power operation of
p+-n+ double-gate SOI
MOSFETs. [Symposium on VLSI Technology, Digest of Technical Papers, (1994),
11-12] T. Tanaka, K. Suzuki, H. Horie, T. Sugii |
| 10 |
Source/drain contact resistance
of silicided thin-film SOI MOSFET's. [IEEE Transactions on Electron Device,
41, (1994), 1007-1012] K. Suzuki, T. Tanaka, Y. Tosaka, T. Sugii, S. Andoh |
| 9 |
Predicted Propagation Delay Time
of Double-Gate SOI MOSFETs Based on a Scaling Theory. [International
Conference on Advanced Microelectronic Device and Processing, (1994),
599-602] K. Suzuki, Y. Tosaka, T. Tanaka, T. Sugii |
| 8 |
Analytical Surface Potential
Expression for Thin-Film Double-Gate SOIMOSFET's. [Solid-State Electronics,
37(2), (1994), 327-332] K. Suzuki, T. Tanaka, Y. To-saka, H. Horie, Y.
Arimoto, T. Itoh |
| [1993] |
|
| 7 |
Scaling theory for double-gate
SOI MOSFET's. [IEEE Transactions on Electron Device, 40, (1993), 2326-2329]
K. Suzuki, T. Tanaka, Y. Tosaka, H. Horie, Y. Arimoto |
| 6 |
Analytical models for symmetric
thin-film double-gate silicon-on-insulator
met-al-oxide-semiconductor-field-effect-transistors. [Japanese Journal of
Applied Physics, 32, (1993), 4916-4922] K. Suzuki, S. Satoh, T. Tanaka, S.
Ando |
| 5 |
Analytical Surface Potential
Expression for Double-gate SOI MOSFETs. [International Workshop on VLSI
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